CS60067: Vlsi System Design

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CS60067
Course name Vlsi System Design
Offered by Computer Science & Engineering
Credits 4
L-T-P 3-1-0
Previous Year Grade Distribution


3
2


2



EX A B C D P F
Semester Autumn


Syllabus[edit | edit source]

Syllabus mentioned in ERP[edit | edit source]

Introduction to VLSI Design, Different types of VLSI design styles: Full custom, standard cell based, gate array based, programmable logic, field programmable gate arrays etc. VLSI Design flow. CMOS logic: PMOS, NMOS and CMOS, Electrical characteristics, operation of MOS transistors as a switch and an amplifier, MOS inverter, stick diagram, design rules and layout, delay analysis, different type of MOS circuits: Dynamic logic, BiCMOS, pass transistors etc. CMOS process, Combinational logic cells, Sequential logic cells, Datapath logic cells, I/O cells. ASIC Library Design: Transistors as Resistors and parasitic Capacitance, Logical effort, gate array, standard cell and datapath cell design. Introduction to hardware description language (HDL) Verilog/VHDL. A logic synthesis example. Floor-planning and Placement: I/O and power planning, clock planning. Routing global and detailed. Example design technique: mapping of architecture to silicon.


Concepts taught in class[edit | edit source]

Student Opinion[edit | edit source]

How to Crack the Paper[edit | edit source]

Classroom resources[edit | edit source]

Additional Resources[edit | edit source]

Time Table[edit | edit source]

Day 8:00-8:55 am 9:00-9:55 am 10:00-10:55 am 11:00-11:55 am 12:00-12:55 pm 2:00-2:55 pm 3:00-3:55 pm 4:00-4:55 pm 5:00-5:55 pm
Monday
Tuesday
Wednesday CSE-107
Thursday CSE-107
Friday CSE-107 CSE-107